PCI (Peripheral Component Interconnect)
Express:
PCIe is based around serial links called lanes. "A connection between a PCIe device and the system is known as a "link"
and this link is built around a dedicated, bi-directional, serial
(1-bit), point-to-point connection known as a "lane". A lane is capable
of simultaneously transferring 250 MB/s of data in each direction. A
link can use more than one lane at a time but all links compliant with
the PCIe specification must minimally support single-lane connections,
referred to as "x1" (pronounced "by-one") links.
For higher potential bandwidth, PCIe devices and systems can optionally
support links using multiple simultaneous lanes – for example, a "x16"
link uses 16 lanes. To support extra lanes, a PCIe card and slot must be
designed to accommodate the extra electrical lines required (2 lines per
lane). Card and slot types exist for x1, x4, x8, and x16 links.
Currently [3/23/2008], the only devices that use a x16 link are graphics
cards. Other devices typically don't require the high potential
bandwidths provided by such a connection." Quoted from
Matrox.
PCI Express 2.0 - Allows up to twice the throughput of current PCI
Express® cards. Doubles the bus standard's bandwidth from 2.5 Gbit/s (PCIe
1.1) to 5 Gbit/sec. PCI Express 2.0 is backwards compatible with PCIe
1.1.
Table 1: Bandwidth of PCI, PCI-X, and AGP Buses
Bus and Frequency |
Peak 32-Bit Transfer Rate |
Peak 64-Bit Transfer Rate |
|
33-MHz PCI |
133 MB/sec |
266 MB/sec |
66-MHz PCI |
266 MB/sec |
532 MB/sec |
100-MHz PCI-X |
Not applicable |
800 MB/sec |
133-MHz PCI-X |
Not applicable |
1 GB/sec |
AGP8X |
2.1 GB/sec |
Not applicable |
Table 2: PCI Express Bandwidth
PCI Express Implementation |
Encoded Data Rate |
Unencoded Data Rate |
|
x1 |
5 Gbps |
4 Gbps
(500 MB/sec) |
x4 |
20 Gbps |
16 Gbps
(2 GB/sec) |
x8 |
40 Gbps |
32 Gbps
(4 GB/sec) |
x16 |
80 Gbps |
64 Gbps
(8 GB/sec) |
|
|
|
Table 3. PCI Express Card Interoperability
PCI Express Implementation |
x1 Slot |
x4 Slot |
x8 Slot |
x16 Slot |
|
x1 Card |
Required |
Required |
Required |
Required |
x4 Card |
No |
Required |
Allowed |
Allowed |
x8 Card |
No |
Allowed* |
Required |
Allowed |
x16 Card |
No |
No |
No |
Required |
*These implementations will have an x8 connector on a wired x4
slot. This means that the slot will accept x8 cards, but run at x4
speeds.
Tables above Quoted from
www.Dell.com - PCI Express Technology: 2004 Technology Whitepaper
PCI (Peripheral Component Interconnect)
Express Background:
Next Generation Display Interface. Formerly Third Generation I/O
Architecture. The next I/O Interface destined to first
coexist with current PCI Spec then to replace PCI & AGP. PCI Express
is said to be backwards compatible with current PCI Specs.
Quoting PCI-SIG
Specs: "PCI Express architecture is a state-of-the-art serial
interconnect technology keeping pace with recent advancements in processor
and memory subsystems.
PCI Express currently runs at 2.5Gtps, or
250MBps per lane in each direction, providing a total bandwidth of 16GBps
in a 32-lane configuration. Future frequency increases will scale up total
bandwidth to the limits of copper and significantly beyond that via other
media without impacting any layers above the Physical Layer in the
protocol stack. PCI Express provides I/O attach points for
high-performance graphics, 1394b, USB
2.0, InfiniBand™ Architecture
(Server I/O Tech Spec), Gigabit Networking and so on."
www.extremetech.com &
www.PCMag.com:
"PCI Express uses a series of point-to-point channels to communicate
information, in either x1, x2, x4, x8, x12, x16, or x32 dual channels,
with 2.0 Gbits/sec of available bandwidth per channel."
-
www.ExtremeTech.com - Generation 2 PCI Express Transfer Rate Defined:
"PCI Express began replacing PCI in 2003 and
2004, although the technology is not expected to gain critical mass
until sometime in 2005, since it is not backwards-compatible with
existing PCI systems." (12/17/2004)
-
www.ExtremeTech.com - Computex ATI Launches PCI Express Cards: "PCI
Express represents a dramatic shift to a new PC infrastructure... All
three of ATI's new PCI Express cards will use a native PCI Express
implementation, without the bridge chip that rival Nvidia uses." PCI
Express debuts this June (6/4/2004).
-
www.ExtremeTech.com - New SIS Chipset Addresses DDR2-667 Memory: New
SIS PCI Express chipsets supporting PCI Express x16 slots announced. ETA
Unknown (6/4/2004).
- Home - PCI Express IT
Network: (6/3/2004).
-
www.ExtremeTech.com - ATI Unveils PCI Express Plans: (6/1/2004).
- InfoWorld Good-bye PCI, hello PCI Express May 21, 2004 By Ephraim
Schwartz HARDWARE NETWORKING: (5/22/2004).
- www.extremetech.com
- Low-Power PCI Express Spec Debuts: Intel IDF (9/16/2003).
- Electronic
Engineering Times - Asia - Agilent partners with Intel on PCI Express
solutions: "Agilent supports the adoption of PCI Express
technology with its development of a wide range of exercisers and
protocol analyzers," said Siegfried Gross, VP and general manager
for Agilent's Digital Verification Solutions Division (4/17/2003).
- www.agilent.com/find/pci_express
- www.eetAsia.com
- Compatibility issue slows PCI Express: PCI, PCI-X and PCI
Express Comparisons (4-16-03).
- vnunet.com
Buyers face I-O dilemma on servers: IT Choosing Server I/O
Architectures next year weighing price & performance issues
(4-4-03).
- EEDesign
- 0-In releases monitor for PCI Express: CheckerWare Monitor
(4-2-03)
- PCWorld.com
- PCI Express Moves Closer to Your PC:
"...PCI-X 2.0 for servers, and PCI Express for PCs."
(5/9/2003)
- Chipsets: www.pcmag.com
- Intel To Overhaul PC With "Grantsdale" Chipset: PCI
Express (2-28-03).
- www.theinquirer.net
- ATI, Intel sort out PCI Express graphics futures:
"...first generation of PCI Express will be driven by photo
realism..." (2-26-03)
- www.theinquirer.net
- PCI Express means death of AGP standard: "Intel
itself will have two chipsets supporting Enterprise PCI Express –
Lindenhurst and Twin Castle." (2-20-03)
- www.extremetech.com
- NewCards To Usher In PCI Express In 2004: PCMCIA is OUT!
(2-19-03)
- www.extremetech.com
- Inside PCI Express: PCI Express uses a series of point-to-point
channels to communicate information, in either x1, x2, x4, x8, x12,
x16, or x32 dual channels, with 2.0 Gbits/sec of available bandwidth
per channel. (9-10-02)
- Intel
Developer Network for PCI Express Architecture: Link Update
(6/3/2004).
-
Intel Developer Network for PCI Express Architecture - PCI Express
Architecture in Communications: (6/3/2004).
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